By Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins
With the prior few decade efforts on lithography and integrated-circuit (IC) applied sciences, very inexpensive microsystems were effectively constructed for lots of varied functions. the fad in instant communications is towards making a networkubiquitous period within the future years. Many exceptional possibilities and demanding situations, similar to layout for multi-standardability and low-voltage (LV) compliance, are quickly changing into the mainstream instructions in wireless-IC learn and improvement, provided that the previous can supply the easiest connectivity between various networks, whereas the latter can facilitate the expertise migration into the sub-1-V nanoscale regimes for additional expense and gear relief.
Analog-Baseband Architecturees and Circuits presents architectural and circuit concepts for instant transceivers to accomplish multistandard and low-voltage compliance. the 1st a part of the e-book reports the actual layer standards of contemporary instant verbal exchange criteria, offers the basic tradeoffs serious about transceiver structure choice, and gives case reviews of the state of the art multistandard transceivers, the place the major innovations bolstered are highlighted and mentioned. A statistical precis (with a hundred+ references brought up) of such a lot used transmitter and receiver architectures for contemporary communique criteria is equipped. all of the references are citied from the prime boards, i.e., ISSCC, CICC, VLSI and ESSCIRC, from 1997 to 2005.
The moment half specializes in the architectural layout of multistandard transceivers. A coarse-RF fine-IF (two-step) channelselection strategy is disclosed. It, during the reconfiguration of receiver and transmitter analog basebands, permits not just a rest of the RF frequency synthesizer’s and native oscillator’s layout requisites, but additionally an effective multistandard compliance through synthesizing the low-IF and zero-IF within the receiver; and the direct-up and two-step-up within the transmitter. the primary is validated in few layout examples. one in every of them is a system-in-a-package (SiP) receiver analog baseband for IEEE 802.11a/b/g WLAN. It not just has the two-step channel choice embedded, but in addition encompasses a flexible-IF topology, a different 3D-stack floorplan, and a specific layout technique for top testability and routability.
The 3rd half bargains with the circuit layout. as well as the methodical description of many LV circuit recommendations, three tailormade LV-robust practical blocks are awarded. They contain: 1) a double-quadrature-downconversion filter out (DQDF) – it realizes simultaneously clock-rate-defined IF reception, I/Q demodulation, IF channel choice and baseband filtering. 2) A switched-current-resistor (SCR) programmable-gain amplifier (PGA) – it deals a transient-free constant-bandwidth achieve adjustment. three) An inside-OpAmp dc-offset canceler – it saves the silicon region required for understanding a wide time consistent on chip whereas maximizing its highpass-pole switchability for quick dc-offset transient.
The final half provides experimental result of the three tailored development blocks and a fully-integrated analog-baseband IC fabricated in a standard-VTH CMOS procedure. formerly untold on-/off-chip co-setup for either full-chip and construction blocks measurements are defined. not just the construction blocks have effectively prolonged the state of the art boundary when it comes to sign bandwidth and provide voltage, the analog-baseband IC has been to date the lowest-voltage-reported resolution for IEEE 802.11a/b/g WLAN receivers.
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With the prior few decade efforts on lithography and integrated-circuit (IC) applied sciences, very inexpensive microsystems were effectively built for plenty of varied functions. the rage in instant communications is towards making a networkubiquitous period within the future years. Many exceptional possibilities and demanding situations, similar to layout for multi-standardability and low-voltage (LV) compliance, are quickly turning into the mainstream instructions in wireless-IC learn and improvement, on condition that the previous can supply the simplest connectivity between assorted networks, whereas the latter can facilitate the expertise migration into the sub-1-V nanoscale regimes for extra expense and tool aid.
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Additional info for Analog-Baseband Architectures And Circuits For Multistandard And Lowvoltage Wireless Transceivers
Case-IV positions an analog IF-to-BB downconverter prior to the A/Ds such that the conversion rate of the A/Ds can be minimized. Different from 14 Analog-Baseband Architectures and Circuits Case-III, the dc-offset cancellation for the PGA and LPF is relaxed in its highpass pole frequency. 5 Comparison of different receiver architectures Table 2-1 summarizes and compares the presented RX architectures. Their characteristics determine their appropriateness for use in modern wireless communication systems, as presented in Section 4.
7 or 71 MHz for commercial filters, a superheterodyne RX for multistandard design normally constitutes a high cost for filtering at different IFs. 2 Image-rejection receiver – Hartley and Weaver The principle of image-rejection RX is to process the desired channel and its image in such a way that the image can be eliminated eventually by signal cancellation. 2] proposed such an idea with the architecture shown in Figure 2-2(a). The RF signal in the downconversion is split into two components by using two matched mixers, a QVCO and an RF synthesizer.
European Solid-State Circuits Conference (ESSCIRC), pp. 494–497, Sept. 2001. 13] Analog-Baseband Architectures and Circuits S. , “A Dual-Band Direct-Conversion/VLIF Transceiver for 50GSM/GSM/DCS/PCS,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp. 230–231, Feb. 2002. [ZIF/LIF/DU] A. , “A Single-Chip Quad-Band (850/900/1800/1900MHz) DirectConversion GSM/GPRS RF Transceiver with Integrated VCOs and Fractional-N Synthesizer,” IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, pp.